Hardware
Chips, accelerators and the physical substrate AI runs on.
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Perplexity’s local agent runs on AMD Ryzen AI Max PCs
Running inference locally lets agents skip metered cloud credits, but AMD names no models, no figures and no supported systems.
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JEDEC publishes the HBM4 memory standard
JEDEC released HBM4, doubling the stack interface to 2,048 bits and channels to 32.
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NVIDIA pretrains a 12B model in 4-bit NVFP4
NVIDIA trained a 12-billion-parameter model on 10 trillion tokens in 4-bit, matching an FP8 baseline.
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TSMC starts volume production on its first GAA node
TSMC confirmed volume 2nm production had begun, its first node using gate-all-around transistors.
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Intel ships the first High-NA EUV chips in volume
Intel became the first to reach high-volume manufacturing of a logic product using High-NA EUV.
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MLPerf Inference v6.1 adds RAG and agentic tests as Rubin arrives in preview
MLPerf’s latest round adds retrieval-augmented generation and edge agentic benchmarks and sets a participation record, but Nvidia’s Rubin silicon appears in the…
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AMD’s MI300X challenges the H100
AMD launches the Instinct MI300X, positioned directly against NVIDIA’s H100.
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NVIDIA unveils Blackwell
NVIDIA announces the Blackwell architecture and GB200 at its developer conference.
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NVIDIA’s Hopper adds a transformer engine
NVIDIA unveils the Hopper architecture and H100, with silicon dedicated to transformers.
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NVIDIA, Arm and Intel agree an FP8 format
The three companies publish a shared 8-bit floating-point specification for AI.